RFR: 8316592: RISC-V: implement poly1305 intrinsic [v3]
null
duke at openjdk.org
Thu Nov 2 14:46:41 UTC 2023
On Wed, 1 Nov 2023 04:45:22 GMT, Fei Yang <fyang at openjdk.org> wrote:
>> null has updated the pull request incrementally with one additional commit since the last revision:
>>
>> Replace slli/add sequence with shadd instruction
>
> src/hotspot/cpu/riscv/stubGenerator_riscv.cpp line 4495:
>
>> 4493: __ push_reg(saved_regs, sp);
>> 4494:
>> 4495: RegSetIterator<Register> regs = RegSet::range(x10, x31).begin();
>
> Maybe let `regs` = (RegSet::range(x10, x31) - RegSet::range(x24, x27)).begin()? Then `saved_regs` could be reduced to RegSet::range(x18, x23). And we will have 18 usable registers in `regs`. Counting the two ones for function `pack_26`, I think that is enough here?
Done.
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PR Review Comment: https://git.openjdk.org/jdk/pull/16417#discussion_r1380260005
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