RFR: 8316592: RISC-V: implement poly1305 intrinsic [v7]

[ArsenyBochkarev]

On Wed, 8 Nov 2023 12:32:50 GMT, Hamlin Li <mli at openjdk.org> wrote:

>> There are two cases here:
>> 1. No loop cycles were performed: the maximum value in `U_2` before the `reduce` is `0b11`, so it is cleared by `srli`;
>> 2. Some loop cycles were performed: it is possible for `U_2 == 0b11` and `t2 == 1` to happen at the end of loop's last `reduce` block, that's correct. However, at the next reduce outside the loop, `U_2` would have `0b100` value which would be cleared to safe `0b1` by `srli`.
>
> Yes, what I'm discussing is the case 2.
> Sorry, I'm still bit concerned.
> 
> You said `at the next reduce outside the loop, U_2 would have 0b100 value which would be cleared to safe 0b1 by srli.`, but seems the dest register of srli is tmp1 not U_2, am I right?
> 
> If I'm right above, then let's continue the discussion.
> Let's say at the entry of LINE 4576 `reduce(U_2, U_1, U_0, t1, t2);` (just out of the loop), U_2 == ob11.
> Then in reduce(), U_2 will be 0b11 at the entry of LINE 4478 `__ add(U_2, U_2, tmp2);`, and tmp2 == 1. Is it possible?

Oh, I see it now. Good catch, thanks! Let's do one final conditional reduce then.

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PR Review Comment: https://git.openjdk.org/jdk/pull/16417#discussion_r1387063502