RFR: 8316592: RISC-V: implement poly1305 intrinsic [v7]

[Hamlin Li]

On Fri, 10 Nov 2023 12:10:27 GMT, Andrew Haley <aph at openjdk.org> wrote:

>> @theRealAph one more question for you (asked above among others), hope it's the last one :)
>> 
>> 2. `wide_mul(U_1, U_1HI, S_0, R_1);  wide_madd(U_1, U_1HI, S_1, R_0);  wide_madd(U_1, U_1HI, S_2, RR_1);` in L7178 at stubGenerator_aarch64.cpp, why S_2*RR_1 does not consider the low 2 bit of R_1, but just the higher bits (which in RR_1)?
>
> The low 2 bits are 00.

Ah, right, all clear! Thanks!

But this makes it harder or not that performant to vectorise poly3015 based on this implementation, as for example R will be R^4 or R^8 (depends on lane numbers we have at runtime), these restrictions designed by the author of poly1305 will not hold anymore.

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PR Review Comment: https://git.openjdk.org/jdk/pull/16417#discussion_r1389334408