RFR: 8316592: RISC-V: implement poly1305 intrinsic [v2]

[null]

On Mon, 30 Oct 2023 16:24:36 GMT, Vladimir Kempik <vkempik at openjdk.org> wrote:

>> null has updated the pull request with a new target base due to a merge or a rebase. The pull request now contains one commit:
>> 
>>   8316592: RISC-V: implement poly1305 intrinsic
>
> src/hotspot/cpu/riscv/stubGenerator_riscv.cpp line 4514:
> 
>> 4512:     __ srli(tmp1, R_0, 2);
>> 4513:     __ slli(tmp2, tmp1, 2);
>> 4514:     __ add(RR_0, tmp1, tmp2);
> 
> can we replace line 4513 and 4514 with shadd(RR_0, tmp1, tmp1, tmp2, 2); ?

Replaced

> src/hotspot/cpu/riscv/stubGenerator_riscv.cpp line 4517:
> 
>> 4515:     __ srli(tmp1, R_1, 2);
>> 4516:     __ slli(tmp2, tmp1, 2);
>> 4517:     __ add(RR_1, tmp1, tmp2);
> 
> can we replace line 4516 and 4517 with shadd(RR_1, tmp1, tmp1, tmp2, 2); ?

Replaced

> src/hotspot/cpu/riscv/stubGenerator_riscv.cpp line 4568:
> 
>> 4566:       __ andi(U_2, U_2, bits2); // Clear U_2 except for the first two bits
>> 4567:       __ slli(tmp2, tmp1, 2);
>> 4568:       __ add(tmp1, tmp1, tmp2); // Impossible to overflow since two leftmost bits are zero'ed in 'srli(tmp1, U_2, 2)'
> 
> can we replace lines 4567 and 4568 with shadd(tmp1, tmp1, tmp1, tmp2, 2); ?

Replaced

> src/hotspot/cpu/riscv/stubGenerator_riscv.cpp line 4582:
> 
>> 4580:     __ srli(tmp1, U_2, 2);
>> 4581:     __ slli(tmp2, tmp1, 2);
>> 4582:     __ add(tmp1, tmp1, tmp2); // tmp1 = U_2 * 5
> 
> can we replace lines 4581 and 4582 with shadd(tmp1, tmp1, tmp1, tmp2, 2); ?

Replaced

-------------

PR Review Comment: https://git.openjdk.org/jdk/pull/16417#discussion_r1377808490
PR Review Comment: https://git.openjdk.org/jdk/pull/16417#discussion_r1377808723
PR Review Comment: https://git.openjdk.org/jdk/pull/16417#discussion_r1377808561
PR Review Comment: https://git.openjdk.org/jdk/pull/16417#discussion_r1377808627