RFR: 8317721: RISC-V: Implement CRC32 intrinsic [v10]

[Fei Yang]

On Sun, 31 Mar 2024 15:47:51 GMT, ArsenyBochkarev <duke at openjdk.org> wrote:

>> Hi everyone! Please review this port of [AArch64](https://github.com/openjdk/jdk/blob/master/src/hotspot/cpu/aarch64/stubGenerator_aarch64.cpp#L4224) `_updateBytesCRC32`, `_updateByteBufferCRC32` and `_updateCRC32` intrinsics. This patch introduces only the plain (non-vectorized, no Zbc) version.
>> 
>> ### Correctness checks
>> 
>> Tier 1/2 tests are ok.
>> 
>> ### Performance results on T-Head board
>> 
>> #### Results for enabled intrinsic:
>> 
>> Used test is `test/micro/org/openjdk/bench/java/util/TestCRC32.java`
>> 
>> | Benchmark                                             |  (count) |  Mode | Cnt    | Score |   Error |  Units |
>> | --- | ---- | ----- | --- | ---- | --- | ---- |
>> | CRC32.TestCRC32.testCRC32Update  |     64  | thrpt     | 24 | 3730.929 | 37.773 | ops/ms |
>> | CRC32.TestCRC32.testCRC32Update  |    128 |  thrpt    | 24 | 2126.673 |  2.032 | ops/ms |
>> | CRC32.TestCRC32.testCRC32Update  |    256 | thrpt    |  24 | 1134.330 |  6.714 | ops/ms |
>> | CRC32.TestCRC32.testCRC32Update  |    512 | thrpt    |  24 |  584.017 |  2.267 | ops/ms |
>> | CRC32.TestCRC32.testCRC32Update  |   2048 |  thrpt   |   24 |  151.173 |  0.346 | ops/ms |
>> | CRC32.TestCRC32.testCRC32Update  |   16384 | thrpt |  24 |   19.113 |  0.008 | ops/ms |
>> | CRC32.TestCRC32.testCRC32Update  |  65536 | thrpt  | 24  |   4.647 | 0.022 | ops/ms |
>> 
>> #### Results for disabled intrinsic:
>> 
>> | Benchmark                                            | (count)  |  Mode | Cnt |   Score  |  Error   | Units     |
>> | --------------------------------------------------- | ---------- | --------- | ---- | ----------- | --------- | ---------- | 
>> | CRC32.TestCRC32.testCRC32Update |      64    |  thrpt   | 15  | 798.365 | 35.486 | ops/ms |
>> | CRC32.TestCRC32.testCRC32Update |     128   |  thrpt   | 15  | 677.756 | 46.619 | ops/ms |
>> | CRC32.TestCRC32.testCRC32Update |     256   |  thrpt   | 15  | 552.781 | 27.143 | ops/ms |
>> | CRC32.TestCRC32.testCRC32Update |     512   |  thrpt   | 15  | 429.304 | 12.518 | ops/ms |
>> | CRC32.TestCRC32.testCRC32Update |    2048  |  thrpt   | 15  | 166.738 |  0.935  | ops/ms |
>> | CRC32.TestCRC32.testCRC32Update |   16384 |  thrpt   | 15  |  25.060  | 0.034   | ops/ms |
>> | CRC32.TestCRC32.testCRC32Update |   65536 |  thrpt   | 15  |   6.196   | 0.030   | ops/ms |
>
> ArsenyBochkarev has updated the pull request incrementally with one additional commit since the last revision:
> 
>   Use srliw to clear upper bits for 'lower' cases

I am having another look.

src/hotspot/cpu/riscv/macroAssembler_riscv.cpp line 1365:

> 1363:   shadd(tmp1, tmp1, table0, tmp1, 2);
> 1364:   lwu(tmp2, Address(tmp1));
> 1365:   xorr(crc, crc, tmp2);

I witnessed slightly better JMH numbers on Lichee-PI-4A with the following sequence:

  if (upper)
    srli(v, v, 32);
  xorr(v, v, crc);

  andi(tmp1, v, right_8_bits);
  shadd(tmp1, tmp1, table3, tmp2, 2);
  lwu(crc, Address(tmp1));

  srli(tmp1, v, 6);
  andi(tmp1, tmp1, (right_8_bits << 2));
  add(tmp1, tmp1, table2);
  lwu(tmp2, Address(tmp1));

  srli(tmp1, v, 14);
  andi(tmp1, tmp1, (right_8_bits << 2));
  add(tmp1, tmp1, table1);
  xorr(crc, crc, tmp2);

  lwu(tmp2, Address(tmp1));
  srliw(tmp1, v, 24);
  shadd(tmp1, tmp1, table0, tmp1, 2);
  xorr(crc, crc, tmp2);

  lwu(tmp2, Address(tmp1));
  xorr(crc, crc, tmp2);

src/hotspot/cpu/riscv/stubRoutines_riscv.cpp line 60:

> 58: 
> 59: /**
> 60:  *  crc_table[] from jdk/src/share/native/java/util/zip/zlib-1.2.5/crc32.h

I think the correct path should be: `jdk/src/java.base/share/native/libzip/zlib/crc32.h`

-------------

PR Review: https://git.openjdk.org/jdk/pull/17046#pullrequestreview-1974015466
PR Review Comment: https://git.openjdk.org/jdk/pull/17046#discussion_r1548013663
PR Review Comment: https://git.openjdk.org/jdk/pull/17046#discussion_r1548007465