RFR: 8317720: RISC-V: Implement Adler32 intrinsic [v2]

[ArsenyBochkarev]

On Fri, 29 Mar 2024 02:15:14 GMT, Fei Yang <fyang at openjdk.org> wrote:

>> ArsenyBochkarev has updated the pull request incrementally with eight additional commits since the last revision:
>> 
>>  - Dispose of some unneeded instructions
>>  - Move buf_end up
>>  - Add missing instructions for accum function split
>>  - Prettify labels and accum function
>>  - Split accum function
>>  - Eliminate L_nmax loop counter
>>  - Move repeating code under function
>>  - Add `enter` and `leave`
>
> src/hotspot/cpu/riscv/stubGenerator_riscv.cpp line 5086:
> 
>> 5084:     const uint64_t BASE = 0xfff1;
>> 5085:     const uint64_t NMAX = 0x15B0;
>> 5086: 
> 
> I think it's better to start a new frame on stub enter and exit with `__ enter()` and `__ leave()` respectively for proper stackwalking of RuntimeStub frame.

Fixed, thanks!

> src/hotspot/cpu/riscv/stubGenerator_riscv.cpp line 5160:
> 
>> 5158:     __ srli(temp2, temp0, 56);
>> 5159:     __ add(s1, s1, temp2);
>> 5160:     __ add(s2, s2, s1);
> 
> I see a lot of duplicate logic in this function. Can we factor out some common logic as separate functions? Like generate_updateBytesAdler32_accum_16, generate_updateBytesAdler32_accum_8, etc.

Fixed

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PR Review Comment: https://git.openjdk.org/jdk/pull/18382#discussion_r1550032999
PR Review Comment: https://git.openjdk.org/jdk/pull/18382#discussion_r1550032956