RFR: 8328998: Encoding support for Intel APX extended general-purpose registers

[Emanuel Peter]

On Tue, 9 Apr 2024 19:44:26 GMT, Dean Long <dlong at openjdk.org> wrote:

>> Add instruction encoding support for Intel APX extended general-purpose registers:
>> 
>> Intel Advanced Performance Extensions (APX) doubles the number of general-purpose registers, from 16 to 32. For more information about APX, see https://www.intel.com/content/www/us/en/developer/articles/technical/advanced-performance-extensions-apx.html.
>> 
>> By specification, instruction encoding remains unchanged for instructions using only the lower 16 GPRs. For cases where one or more instruction operands reference extended GPRs (Egprs), encoding targets either REX2, an extension of REX encoding, or an extended version of EVEX encoding. These new encoding schemes extend or modify existing instruction prefixes only when Egprs are used.
>
> How can we be confident that the encoding is correct?  Would it be possible to write tests for this?  Maybe one that disassembles it and compares the result to a 3rd party disassembler offline or in-process hsdis?

And I agree with @dean-long : you need to have some test for this. At least some test should have the flag enabled. Something that stresses the registers, and verifies the results could be an idea.

Also: I suspect you would want to put this flag into the IR-framework whitelist, since it has no effect on the IR, right?

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PR Comment: https://git.openjdk.org/jdk/pull/18476#issuecomment-2056391104