RFR: 8328998: Encoding support for Intel APX extended general-purpose registers

[Emanuel Peter]

On Mon, 25 Mar 2024 19:01:17 GMT, Steve Dohrmann <duke at openjdk.org> wrote:

> Add instruction encoding support for Intel APX extended general-purpose registers:
> 
> Intel Advanced Performance Extensions (APX) doubles the number of general-purpose registers, from 16 to 32. For more information about APX, see https://www.intel.com/content/www/us/en/developer/articles/technical/advanced-performance-extensions-apx.html.
> 
> By specification, instruction encoding remains unchanged for instructions using only the lower 16 GPRs. For cases where one or more instruction operands reference extended GPRs (Egprs), encoding targets either REX2, an extension of REX encoding, or an extended version of EVEX encoding. These new encoding schemes extend or modify existing instruction prefixes only when Egprs are used.

Can the APX features be simulated, maybe even with SDE?

Now you made the flag EXPERIMENTAL and by default false. What is the roadmap with this? It is generally not great to have default false flags, because the code underneath will just slowly rot and become broken. Is there a plan to eventually make it default true? What stops us from doing that already now?

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PR Comment: https://git.openjdk.org/jdk/pull/18476#issuecomment-2056398463