RFR: 8328998: Encoding support for Intel APX extended general-purpose registers [v2]

[Steve Dohrmann]

On Fri, 19 Apr 2024 11:47:37 GMT, Jatin Bhateja <jbhateja at openjdk.org> wrote:

>> src/hotspot/cpu/x86/assembler_x86.cpp line 12925:
>> 
>>> 12923: void Assembler::prefix_rex2(Address adr, bool is_map1) {
>>> 12924:   int bits = is_map1 ? REX2BIT_M0 : 0;
>>> 12925:   bits |= get_base_prefix_bits(adr.base()->encoding());
>> 
>> Suggestion:
>> 
>>   bits |= get_base_prefix_bits(adr.base());
>
> As per section 3.7.5 of Intel SDM (Index ∗ Scale) + Displacement is a valid addressing mode.  Thus we should set the bits corresponding to extended base register encoding only if its a valid register.

Thank you @jatin-bhateja.  I've made the change.

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PR Review Comment: https://git.openjdk.org/jdk/pull/18476#discussion_r1572991954