RFR: 8321014: RISC-V: C2 VectorLoadShuffle [v2]
Fei Yang
fyang at openjdk.org
Mon Apr 22 07:34:28 UTC 2024
On Thu, 18 Apr 2024 13:40:30 GMT, Hamlin Li <mli at openjdk.org> wrote:
>> Hi,
>> Can you help to review the patch for instrinsic VectorLoadShuffle?
>>
>> BTW, without this intrinsic, some other vector api operation does not work as well (e.g. rearrange) on riscv.
>>
>> Thanks
>>
>> ## Test
>> test/jdk/jdk/incubator/vector/
>> test/hotspot/jtreg/compiler/vectorapi
>
> Hamlin Li has updated the pull request incrementally with one additional commit since the last revision:
>
> add comment
Changes requested by fyang (Reviewer).
src/hotspot/cpu/riscv/riscv_v.ad line 3581:
> 3579: predicate(Matcher::vector_element_basic_type(n) == T_BYTE);
> 3580: match(Set dst (VectorLoadShuffle dst));
> 3581: effect(TEMP_DEF dst);
Seems no need to add a `TEMP_DEF` for `dst` here.
src/hotspot/cpu/riscv/riscv_v.ad line 3586:
> 3584: // For T_BYTE, no need to do anything
> 3585: %}
> 3586: ins_pipe(pipe_slow);
I think `pipe_class_empty` is better since this emits nothing at all.
src/hotspot/cpu/riscv/riscv_v.ad line 3602:
> 3600: __ vsetvli_helper(bt, Matcher::vector_length(this));
> 3601: if (bt == T_SHORT) {
> 3602: __ vsext_vf2(as_VectorRegister($dst$$reg), as_VectorRegister($src$$reg));
I prefer `vzext_vf2/4/8` which does zero extension for the source indexes.
-------------
PR Review: https://git.openjdk.org/jdk/pull/18835#pullrequestreview-2013895647
PR Review Comment: https://git.openjdk.org/jdk/pull/18835#discussion_r1574229098
PR Review Comment: https://git.openjdk.org/jdk/pull/18835#discussion_r1574214923
PR Review Comment: https://git.openjdk.org/jdk/pull/18835#discussion_r1574261651
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