RFR: 8325991: Accelerate Poly1305 on x86_64 using AVX2 instructions [v4]

[Sandhya Viswanathan]

On Wed, 21 Feb 2024 05:40:13 GMT, Srinivas Vamsi Parasa <duke at openjdk.org> wrote:

>> The goal of this PR is to accelerate the Poly1305 algorithm using AVX2 instructions (including IFMA) for x86_64 CPUs.
>> 
>> This implementation is directly based on the AVX2 Poly1305 hash computation as implemented in Intel(R) Multi-Buffer Crypto for IPsec Library (url: https://github.com/intel/intel-ipsec-mb/blob/main/lib/avx2_t3/poly_fma_avx2.asm)
>
> Srinivas Vamsi Parasa has updated the pull request incrementally with one additional commit since the last revision:
> 
>   remove unused uniions and fix uses_vl

src/hotspot/cpu/x86/assembler_x86.cpp line 5195:

> 5193:   assert(VM_Version::supports_avxifma() && (vector_len == AVX_128bit || vector_len == AVX_256bit), "");
> 5194:   InstructionMark im(this);
> 5195:   InstructionAttr attributes(vector_len, /* rex_w */ true, /* legacy_mode */ false, /* no_mask_reg */ false, /* uses_vl */ false);

uses_vl should be true for all vpmadd52 instructions. 
The assert could be coded as:
assert(vector_len == AVX_512bit ? VM_Version::supports_evex() : VM_Version::supports_avxifma(), "");

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PR Review Comment: https://git.openjdk.org/jdk/pull/17881#discussion_r1500080836