Withdrawn: 8321137: Relax ICStub alignment

[Aleksey Shipilev]

On Thu, 30 Nov 2023 18:31:24 GMT, Aleksey Shipilev <shade at openjdk.org> wrote:

> WIP, submitting for others to poke holes in it.
> 
> Similarly to [JDK-8284578](https://bugs.openjdk.org/browse/JDK-8284578), we would like to handle `ICStub` alignment. Currently, the small stub that takes only 24 bytes of code is covered by 128 bytes on AArch64. This is due to the same thing fixed by [JDK-8284578](https://bugs.openjdk.org/browse/JDK-8284578) for interpreter codelets: aligning twice the `CodeEntryAlignment`.
> 
> 128 bytes per `ICStub` means we deplete 10K `ICBuffer` with only 79 stubs. This actually happens multiple times even on a simple `HelloWorld.java` invocation that invokes some javac code, causing `ICBufferFull` safepoints. We can increase `ICBuffer` size, especially after [JDK-8314220](https://bugs.openjdk.org/browse/JDK-8314220), but we cannot do this without limits, since it eats up code cache.
> 
> But if we assume that code entry alignment is not a strict requirement, and used to improve performance for frequently used code, then maybe we do not have to over-align the IC stub, given it is probably only used during IC transitions? It would significantly improve `ICStub` footprint and require smaller `ICBuffer`.
> 
> Current patch affects ICStub size in different ways on different platforms, since current size is effectively 2x`CodeEntryAlignment`, and new size is cache line size:
>   - AArch64: 128 -> 64 bytes
>   - x86_64: 64 -> 64 bytes 
>   - PPC64: 512 -> 128 bytes
>   - S390X: 128 -> 256 bytes (!)
>   - ARM: 32 -> 64 bytes (!)
>   - Zero: <not applicable, Zero does not use IC stubs>
> 
> Additional testing:
>  - [x] Linux x86_64 server fastdebug `tier1 tier2 tier3`
>  - [x] Linux AArch64 server fastdebug `tier1 tier2 tier3`

This pull request has been closed without being integrated.

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PR: https://git.openjdk.org/jdk/pull/16911