RFR: 8317720: RISC-V: Implement Adler32 intrinsic [v14]

[ArsenyBochkarev]

On Mon, 1 Jul 2024 13:30:56 GMT, Fei Yang <fyang at openjdk.org> wrote:

>> ArsenyBochkarev has updated the pull request incrementally with one additional commit since the last revision:
>> 
>>   Optimize vtables generation for MaxVectorSize == 16
>
> src/hotspot/cpu/riscv/stubGenerator_riscv.cpp line 5208:
> 
>> 5206:     // s2 is initialized to the upper 16 bits of adler
>> 5207:     __ zero_extend(s1, s1, 16); // s1 = (adler & 0xffff)
>> 5208:     __ srliw(s2, adler, 16); // s2 = ((adler >> 16) & 0xffff)
> 
> The update here doesn't seem correct to me. Note that `s1` is an alias of `adler` at the entry. 
> 
>     Register adler  = c_rarg0;
>     Register s1     = c_rarg0;

Thanks! Just in case I missed something else: i re-ran the `test/hotspot/jtreg/compiler/intrinsics/zip/TestAdler32.java` and it's OK.

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PR Review Comment: https://git.openjdk.org/jdk/pull/18382#discussion_r1661352091