RFR: 8332670: C1 clone intrinsic needs memory barriers

[Gui Cao]

On Tue, 4 Jun 2024 08:26:08 GMT, Galder Zamarreño <galder at openjdk.org> wrote:

>> Adds a storestore barrier after copying the contents in the primitive array intrinsic (credit @shipilev). The barrier is a no-op in platforms where not needed so no need for an ifdef.
>> 
>> The barrier after new array creation is only added if zeroing the array on aarch64 (credit @dean-long). Since the primitive array clone intrinsic does not zero the array, that means there's a single barrier added for this use case.
>> 
>> There's no barrier added on x86 c1 macro assembler for nothing to do there. 
>> 
>> I've run the following tests:
>> * tier 1 on darwin/aarch64
>> * tier 1 on linux/x86_64
>> * `hotspot_compiler` tests on darwin/aarch64
>> * `copy.clone.arrays` jcstress tests on darwin/aarch64.
>> 
>> I tried but was unable to create a standalone test for the jdk source tree that would fail.
>> 
>> FYI @bulasevich @TheRealMDoerr @RealFYang @RealLucy similar platform specific c1 macro assembler changes might be required for other platforms.
>
> Forgot to say, this change shows no impact on the array clone micro benchmark. This is expected since the change moves the barrier from one place (after array creation) to another (after copying contents), so no additional barriers are introduced.

@galderz Hi, I have finished the RISC-V part, tier1-3 tested on SOPHON SG2042.
Please help us to add the RISC-V part, thanks a lot!
[19538-riscv-port-v1.diff.txt](https://github.com/user-attachments/files/15571986/19538-riscv-port-v1.diff.txt)

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PR Comment: https://git.openjdk.org/jdk/pull/19538#issuecomment-2148694857