RFR: 8329032: C2 compiler register allocation support for APX EGPRs

[Vladimir Kozlov]

On Wed, 1 May 2024 18:42:13 GMT, Jatin Bhateja <jbhateja at openjdk.org> wrote:

> Intel® Advanced Performance Extensions (Intel® APX) adds 16 new 64 bit general purpose register also known as Extended General Purpose Registers in IA-32e 64 bit mode.
> 
> Summary of changes introduced along with this patch:-
> 
> 1. C2 compiler register allocation support.
> 2. Architecture state save restoration while transitioning from C1/C2 JIT compiled code to runtime services.
> 3. Support new PUSH2/POP2 instructions along with push-pop acceleration hints (PPX) to optimize register save/restore operation.
> 4. Applicable extensions to native interface used by runtime for patching instruction.
> 
> We plan to address C1 register support in subsequent patch as there are hard upper bound allocation limits
> (currently set to r11) imposed by existing implementation of linear scan algorithm after which it reserves
> remaining register for special purpose.
> 
> Patch has been regressed over stand alone test points after prioritizing EGPR allocations over existing GPR register by manually modifying the register sequences in relevant allocation class.
> 
> We plan to do thorough validation using [Intel's SDE](https://www.intel.com/content/www/us/en/download/684897/intel-software-development-emulator.html) during course of time and release incremental patches for bug fixes
> found during testing.
> 
> Kindly review and share your feedback.
> 
> Best Regards,
> Jatin

Looks like there is issue with 32-bit builds. See GHA ` linux-x86 / build ` failure.

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PR Comment: https://git.openjdk.org/jdk/pull/19042#issuecomment-2166085003