Integrated: 8329032: C2 compiler register allocation support for APX EGPRs

[Jatin Bhateja]

On Wed, 1 May 2024 18:42:13 GMT, Jatin Bhateja <jbhateja at openjdk.org> wrote:

> Intel® Advanced Performance Extensions (Intel® APX) adds 16 new 64 bit general purpose register also known as Extended General Purpose Registers in IA-32e 64 bit mode.
> 
> Summary of changes introduced along with this patch:-
> 
> 1. C2 compiler register allocation support.
> 2. Architecture state save restoration while transitioning from C1/C2 JIT compiled code to runtime services.
> 3. Support new PUSH2/POP2 instructions along with push-pop acceleration hints (PPX) to optimize register save/restore operation.
> 4. Applicable extensions to native interface used by runtime for patching instruction.
> 
> We plan to address C1 register support in subsequent patch as there are hard upper bound allocation limits
> (currently set to r11) imposed by existing implementation of linear scan algorithm after which it reserves
> remaining register for special purpose.
> 
> Patch has been regressed over stand alone test points after prioritizing EGPR allocations over existing GPR register by manually modifying the register sequences in relevant allocation class.
> 
> We plan to do thorough validation using [Intel's SDE](https://www.intel.com/content/www/us/en/download/684897/intel-software-development-emulator.html) during course of time and release incremental patches for bug fixes
> found during testing.
> 
> Kindly review and share your feedback.
> 
> Best Regards,
> Jatin

This pull request has now been integrated.

Changeset: e5de26dd
Author:    Jatin Bhateja <jbhateja at openjdk.org>
URL:       https://git.openjdk.org/jdk/commit/e5de26ddf0550da9e6d074d5b9ab4a943170adca
Stats:     790 lines in 26 files changed: 605 ins; 53 del; 132 mod

8329032: C2 compiler register allocation support for APX EGPRs

Reviewed-by: kvn, sviswanathan

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PR: https://git.openjdk.org/jdk/pull/19042