RFR: 8325991: Accelerate Poly1305 on x86_64 using AVX2 instructions [v10]

[Jatin Bhateja]

On Tue, 27 Feb 2024 21:13:07 GMT, Srinivas Vamsi Parasa <duke at openjdk.org> wrote:

>> The goal of this PR is to accelerate the Poly1305 algorithm using AVX2 instructions (including IFMA) for x86_64 CPUs.
>> 
>> This implementation is directly based on the AVX2 Poly1305 hash computation as implemented in Intel(R) Multi-Buffer Crypto for IPsec Library (url: https://github.com/intel/intel-ipsec-mb/blob/main/lib/avx2_t3/poly_fma_avx2.asm)
>> 
>> This PR shows upto 19x speedup on buffer sizes of 1MB.
>
> Srinivas Vamsi Parasa has updated the pull request incrementally with one additional commit since the last revision:
> 
>   Update description of Poly1305 algo

Changes requested by jbhateja (Reviewer).

src/hotspot/cpu/x86/assembler_x86.cpp line 9115:

> 9113: 
> 9114: void Assembler::vpunpcklqdq(XMMRegister dst, XMMRegister nds, XMMRegister src, int vector_len) {
> 9115:   assert(UseAVX > 0, "requires some form of AVX");

Add appropriate AVX512VL assertion

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PR Review: https://git.openjdk.org/jdk/pull/17881#pullrequestreview-1910377861
PR Review Comment: https://git.openjdk.org/jdk/pull/17881#discussion_r1508520924