RFR: 8325991: Accelerate Poly1305 on x86_64 using AVX2 instructions [v10]

[Srinivas Vamsi Parasa]

On Fri, 1 Mar 2024 17:02:35 GMT, Sandhya Viswanathan <sviswanathan at openjdk.org> wrote:

>> src/hotspot/cpu/x86/assembler_x86.cpp line 5148:
>> 
>>> 5146:   assert(vector_len == AVX_512bit ? VM_Version::supports_avx512ifma() : VM_Version::supports_avxifma(), "");
>>> 5147:   InstructionMark im(this);
>>> 5148:   InstructionAttr attributes(vector_len, /* rex_w */ true, /* legacy_mode */ false, /* no_mask_reg */ false, /* uses_vl */ true);
>> 
>> uses_vl should be false here.
>> 
>> BTW, this assertion looks very fuzzy, you are checking for two target features in one instruction,  apparently, instruction is meant to use AVX512_IFMA only for 512 bit vector length, and for narrower vectors its needs AVX_IFMA.
>> 
>> Lets either keep this strictly for AVX_IFMA for AVX512_IFMA we already have evpmadd52[l/h]uq, if you truly want to make this generic one then split the assertion
>> 
>> `assert ( (avx_ifma && vector_len <= 256) || (avx512_ifma  && (vector_len == 512 || VM_Version::support_vl()));
>> `
>> 
>> And then you may pass uses_vl at true.
>
> It would be good to make this instruction generic.

Please see the updated assert as suggested for vpmadd52[l/h]uq in the latest commit.

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PR Review Comment: https://git.openjdk.org/jdk/pull/17881#discussion_r1511830438