RFR: 8326385: [aarch64] C2: lightweight locking nodes kill the box register without specifying this effect

Mon Mar 11 10:47:15 UTC 2024

This changeset introduces a third `TEMP` register for the intermediate computations in the `cmpFastLockLightweight` and `cmpFastUnlockLightweight` aarch64 ADL instructions, instead of using the legacy `box` register. This prevents potential overwrites, and consequent erroneous uses, of `box`.

Introducing a new `TEMP` seems conceptually simpler (and not necessarily worse from a performance perspective) than pre-assigning `box` an arbitrary register and marking it as `USE_KILL`, an alternative also suggested in the [JBS issue description](https://bugs.openjdk.org/browse/JDK-8326385). Compared to mainline, the changeset does not lead to any statistically significant regression in a set of locking-intensive benchmarks from DaCapo, Renaissance, SPECjvm2008, and SPECjbb2015.

#### Testing

 - tier1-7 (linux-aarch64 and macosx-x64) with `-XX:LockingMode=2`.

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Commit messages:
 - Add additional temporary register

Changes: https://git.openjdk.org/jdk/pull/18183/files
 Webrev: https://webrevs.openjdk.org/?repo=jdk&pr=18183&range=00
  Issue: https://bugs.openjdk.org/browse/JDK-8326385
  Stats: 8 lines in 1 file changed: 0 ins; 0 del; 8 mod
  Patch: https://git.openjdk.org/jdk/pull/18183.diff
  Fetch: git fetch https://git.openjdk.org/jdk.git pull/18183/head:pull/18183

PR: https://git.openjdk.org/jdk/pull/18183