RFR: 8326385: [aarch64] C2: lightweight locking nodes kill the box register without specifying this effect

[Dean Long]

On Mon, 11 Mar 2024 09:26:48 GMT, Roberto Castañeda Lozano <rcastanedalo at openjdk.org> wrote:

> This changeset introduces a third `TEMP` register for the intermediate computations in the `cmpFastLockLightweight` and `cmpFastUnlockLightweight` aarch64 ADL instructions, instead of using the legacy `box` register. This prevents potential overwrites, and consequent erroneous uses, of `box`.
> 
> Introducing a new `TEMP` seems conceptually simpler (and not necessarily worse from a performance perspective) than pre-assigning `box` an arbitrary register and marking it as `USE_KILL`, an alternative also suggested in the [JBS issue description](https://bugs.openjdk.org/browse/JDK-8326385). Compared to mainline, the changeset does not lead to any statistically significant regression in a set of locking-intensive benchmarks from DaCapo, Renaissance, SPECjvm2008, and SPECjbb2015.
> 
> #### Testing
> 
>  - tier1-7 (linux-aarch64 and macosx-aarch64) with `-XX:LockingMode=2`.

src/hotspot/cpu/aarch64/aarch64.ad line 16026:

> 16024:   predicate(LockingMode == LM_LIGHTWEIGHT);
> 16025:   match(Set cr (FastLock object box));
> 16026:   effect(TEMP tmp, TEMP tmp2, TEMP tmp3);

Why not use `box` as the temp instead of intruducing a separate temp?
Suggestion:

  effect(TEMP tmp, TEMP tmp2, TEMP box);

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PR Review Comment: https://git.openjdk.org/jdk/pull/18183#discussion_r1520532174