RFR: 8328998: Encoding support for Intel APX extended general-purpose registers [v9]

[Steve Dohrmann]

On Wed, 1 May 2024 00:15:28 GMT, Sandhya Viswanathan <sviswanathan at openjdk.org> wrote:

>> Steve Dohrmann has updated the pull request incrementally with one additional commit since the last revision:
>> 
>>   fixes: pp bits in crc32, REX2 branch in ldmxcsr
>
>> It looks to me that the source and dest are reversed in the following instruction in call to simd_prefix_and_encode, perhaps that should be a separate PR: // Do we have this wrong src and dst reversed in simd_prefix_and_encode? void Assembler::pextrw(Register dst, XMMRegister src, int imm8) { assert(VM_Version::supports_sse2(), ""); InstructionAttr attributes(AVX_128bit, /* rex_w _/ false, /_ legacy_mode _/ _legacy_mode_bw, /_ no_mask_reg _/ true, /_ uses_vl */ false); int encode = simd_prefix_and_encode(as_XMMRegister(dst->encoding()), xnoreg, src, VEX_SIMD_66, VEX_OPCODE_0F, &attributes); emit_int24((unsigned char)0xC5, (0xC0 | encode), imm8); } Once that PR is fixed, is_src_gpr should be set to true for this one as well.
> 
> Verified that the pextrw has the operands reversed per the SDM, so please ignore this comment.

@sviswa7 Thank you for your review comments.  Very helpful!

> src/hotspot/cpu/x86/assembler_x86.cpp line 2621:
> 
>> 2619: 
>> 2620: void Assembler::ldmxcsr( Address src) {
>> 2621:   if (UseAVX > 0 && !needs_rex2(src.base(), src.index()) ) {
> 
> When UseAPX is true, it is good to always use the SSE flavor of ldmxcsr/stmxcsr.

Thanks, modified assert in these two functions.

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PR Comment: https://git.openjdk.org/jdk/pull/18476#issuecomment-2089312785
PR Review Comment: https://git.openjdk.org/jdk/pull/18476#discussion_r1586933566