RFR: 8328998: Encoding support for Intel APX extended general-purpose registers [v23]

[Steve Dohrmann]

On Tue, 21 May 2024 06:03:16 GMT, Emanuel Peter <epeter at openjdk.org> wrote:

>> Steve Dohrmann has updated the pull request incrementally with one additional commit since the last revision:
>> 
>>   added comment about UseAPX and UseAVX > 2 correspondence
>
> src/hotspot/cpu/x86/assembler_x86.cpp line 1668:
> 
>> 1666: void Assembler::andnl(Register dst, Register src1, Register src2) {
>> 1667:   assert(VM_Version::supports_bmi1(), "bit manipulation instructions not supported");
>> 1668:   assert(!needs_eevex(dst, src1, src2) || UseAPX, "extended gpr use requires UseAPX and UseAVX > 2");
> 
> Technical detail: `UseAPX and UseAVX > 2` sounds wrong. Did you mean to say "or"? Because UseAPX is only enabled when `UseAVX >= 3`.

Thanks, see comment below.

> src/hotspot/cpu/x86/assembler_x86.cpp line 2036:
> 
>> 2034:   InstructionMark im(this);
>> 2035:   if (needs_eevex(crc, adr.base(), adr.index())) {
>> 2036:     assert(UseAPX, "extended gpr use requires UseAPX and UseAVX > 2");
> 
> Maybe here the "and" makes sense, but not sure.

Yes, "and" is technically correct.  APX includes instructions that require AVX 3 (evex) encoding for extended gpr use, together with +UseAPX.

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PR Review Comment: https://git.openjdk.org/jdk/pull/18476#discussion_r1608653686
PR Review Comment: https://git.openjdk.org/jdk/pull/18476#discussion_r1608653580