RFR: 8342601: AArch64: Micro-optimize bit shift in copy_memory [v3]

[Andrew Haley]

On Tue, 22 Oct 2024 10:12:39 GMT, Andrew Haley <aph at openjdk.org> wrote:

> > BTW, apparently Neoverse has 0 latency moves even for 32-bit registers, so they must do something clever with clearing the high bits.
> 
> So they are. Some dark magic there. :-)

Oh, and I just realized: this means that clearing the upper bits of a compressed Klass pointer can be done with a zero-latency MOV as well, rather than an AND. That's an optimization worth having.

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PR Comment: https://git.openjdk.org/jdk/pull/21589#issuecomment-2430183263