RFR: 8340590: RISC-V: C2: Small improvement to vector gather load and scattter store

[Fei Yang]

On Mon, 23 Sep 2024 03:03:23 GMT, Gui Cao <gcao at openjdk.org> wrote:

> Hi, 
> This is a small improvement for RISC-V C2 vector gather load and scattter store nodes. Currently, we emit whole vector register move (vmv1r.v) to move vector idx to a temp vector register. But a normal vector integer move (vmv.v.v) would do and is more reasonable as the vtype and vl are known here.
> 
> 
> ### Testing
> - [x] make test TEST="jdk_vector" JTREG="TIMEOUT_FACTOR=32" on qemu with UseRVV1.0

Looks fine. Thanks.

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Marked as reviewed by fyang (Reviewer).

PR Review: https://git.openjdk.org/jdk/pull/21123#pullrequestreview-2321101686