RFR: 8340590: RISC-V: C2: Small improvement to vector gather load and scatter store [v2]

[duke]

On Mon, 23 Sep 2024 07:14:08 GMT, Gui Cao <gcao at openjdk.org> wrote:

>> Hi, 
>> This is a small improvement for RISC-V C2 vector gather load and scatter store nodes. Currently, we emit whole vector register move (vmv1r.v) to move vector idx to a temp vector register. But a normal vector integer move (vmv.v.v) would do and is more reasonable as the vtype and vl are known here.
>> 
>> 
>> ### Testing
>> - [x] make test TEST="jdk_vector" JTREG="TIMEOUT_FACTOR=32" on qemu with UseRVV1.0
>
> Gui Cao has updated the pull request incrementally with one additional commit since the last revision:
> 
>   Polishing

@zifeihan 
Your change (at version 03f6e3a8d49665d5acba4acf5ce02e49d52d77b7) is now ready to be sponsored by a Committer.

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PR Comment: https://git.openjdk.org/jdk/pull/21123#issuecomment-2370183969