RFR: 8352675: Support Intel AVX10 converged vector ISA feature detection [v3]

[Vladimir Ivanov]

On Thu, 3 Apr 2025 02:58:17 GMT, Jatin Bhateja <jbhateja at openjdk.org> wrote:

>> - Intel AVX10[1] extends and enhances the capabilities of Intel AVX-512 to benefit all Intel® products and will be the vector ISA of choice moving into the future. 
>> - It supports a new ISA versioning scheme which simplifies the existing AVX512 feature enumeration scheme. Feature set supported by an AVX10 ISA version will be supported by all the versions above it.
>> - The initial, fully-featured version of Intel® AVX10 will be enumerated as Version 2 (denoted as Intel® AVX10.2). This will include the new ISA extension over the existing AVX512 instructions. 
>> - An early version of Intel® AVX10 (Version 1, or Intel® AVX10.1) that only enumerates the Intel® AVX-512 instruction set at 128, 256, and 512 bits will be enabled on the Granite Rapids Server for software pre-enabling.
>> 
>> This patch adds the necessary CPUID feature detection for AVX10 ISA version 1 and 2.  In terms of architectural state save restoration, AVX10 is isomorphic to AVX512 support up till Granite Rapids. State components affected by AVX10 extension include SSE, AVX, Opmask, ZMM_Hi256, and Hi16_ZMM registers. 
>> 
>> The patch has been regressed through tier1 and jvmci tests 
>> 
>> Please review and share your feedback.
>> 
>> Best Regards,
>> Jatin
>> 
>> [1] https://www.intel.com/content/www/us/en/content-details/844829/intel-advanced-vector-extensions-10-2-intel-avx10-2-architecture-specification.html
>
> Jatin Bhateja has refreshed the contents of this pull request, and previous commits have been removed. The incremental views will show differences compared to the previous content of the PR. The pull request contains one new commit since the last revision:
> 
>   8352675: Support Intel AVX10 converged vector ISA feature detection

src/hotspot/cpu/x86/vm_version_x86.cpp line 895:

> 893:     _features = _cpuid_info.feature_flags(); // These can be changed by VM settings
> 894:     _extra_features = _cpuid_info.extra_feature_flags(); // These can be changed by VM settings
> 895:     _cpu_features = _features;   // Preserve features

`_cpu_features` now captures only part of CPU features JVM cares about.

src/hotspot/cpu/x86/vm_version_x86.cpp line 1117:

> 1115:               cpu_family(), _model, _stepping, os::cpu_microcode_revision());
> 1116:   assert(res > 0, "not enough temporary space allocated");
> 1117:   insert_features_names(_features, buf + res, sizeof(buf) - res, _features_names);

x86 is the only platform which uses `insert_features_names`. Other platforms rely on macros. Maybe it's time to do the same on x86?

src/hotspot/share/runtime/abstract_vm_version.hpp line 61:

> 59:   // Extra CPU feature flags used when all 64 bits of _features are exhausted for
> 60:   // on a given target, currently only used for x86_64, can be affected by VM settings.
> 61:   static uint64_t _extra_features;

That's unfortunate. Maybe it's time to turn `_features` into a fixed size (platform-specific) bitmap instead? (`RegMask` is one existing example.) Having 2 independent fields is error-prone (look at  `_cpu_features`).

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PR Review Comment: https://git.openjdk.org/jdk/pull/24329#discussion_r2036008552
PR Review Comment: https://git.openjdk.org/jdk/pull/24329#discussion_r2035996215
PR Review Comment: https://git.openjdk.org/jdk/pull/24329#discussion_r2036007023