RFR: 8351994: Enable Extended EVEX to REX2/REX demotion when src and dst are the same [v2]

[Sandhya Viswanathan]

On Thu, 10 Apr 2025 22:57:39 GMT, Srinivas Vamsi Parasa <sparasa at openjdk.org> wrote:

>> The current scheme for Intel APX NDD code generation favors the emission of NDD instruction on APX-enabled targets, even if destination and source registers are the same. To prevent this, this PR extends the assembler layer to demote EEVEX to REX encoding if dst matches with source operands.
>
> Srinivas Vamsi Parasa has updated the pull request incrementally with one additional commit since the last revision:
> 
>   Disable demotion for esetzucc and cleanup code

src/hotspot/cpu/x86/assembler_x86.cpp line 17181:

> 17179:   InstructionAttr attributes(AVX_128bit, /* vex_w */ false, /* legacy_mode */ false, /* no_mask_reg */ true, /* uses_vl */ false);
> 17180:   // Encoding Format : eevex_prefix (4 bytes) | opcode_cc | modrm
> 17181:   int encode =  evex_prefix_and_encode_ndd(0, 0, dst->encoding(), VEX_SIMD_F2, /* MAP4 */VEX_OPCODE_0F_3C, &attributes, false, false, false); // demotion disabled

Instead of adding the demote flag, the better way to do this is by adding a single register evex_prefix_and encode_ndd:
evex_prefix_and_encode_ndd(dst->encoding(), VEX_SIMD_F2, /* MAP4 */VEX_OPCODE_0F_3C, &attributes);

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PR Review Comment: https://git.openjdk.org/jdk/pull/24431#discussion_r2040256325