RFR: 8329887: RISC-V: C2: Support Zvbb Vector And-Not instruction [v8]

[Fei Yang]

On Sat, 12 Apr 2025 08:02:21 GMT, Anjian-Wen <duke at openjdk.org> wrote:

>> support Zvbb Vector And-Not vandn.vv (with and without masked) match rule and add new test in jtreg
>
> Anjian-Wen has updated the pull request incrementally with one additional commit since the last revision:
> 
>   fix test bug

src/hotspot/cpu/riscv/riscv_v.ad line 1124:

> 1122: // vector and not
> 1123: 
> 1124: instruct vand_notI(vReg dst, vReg src2, vReg src1, immI_M1 m1) %{

`src2` should come after `src1`. Can you reoder it? Similar for `vand_notL`.

test/hotspot/jtreg/compiler/vectorapi/AllBitsSetVectorMatchRuleTest.java line 46:

> 44:  * @requires vm.compiler2.enabled
> 45:  * @requires (os.simpleArch == "aarch64" & vm.cpu.features ~= ".*asimd.*") | (os.simpleArch == "riscv64" & vm.cpu.features ~= ".*zvbb.*")
> 46:  * @summary [vector] Make all bits set vector sharable for match rules

Better to keep the original summary (`AArch64: [vector] Make all bits set vector sharable for match rules`) which maps to https://bugs.openjdk.org/browse/JDK-8287984

test/hotspot/jtreg/compiler/vectorapi/AllBitsSetVectorMatchRuleTest.java line 68:

> 66:     private static long[] la;
> 67:     private static long[] lb;
> 68:     private static long[] lr;

Can you reoder it a bit so that int[] and long[] test cases are grouped together?

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PR Review Comment: https://git.openjdk.org/jdk/pull/24129#discussion_r2041572000
PR Review Comment: https://git.openjdk.org/jdk/pull/24129#discussion_r2041542639
PR Review Comment: https://git.openjdk.org/jdk/pull/24129#discussion_r2041565117