RFR: 8351994: Enable Extended EVEX to REX2/REX demotion when src and dst are the same [v14]

[Sandhya Viswanathan]

On Fri, 25 Apr 2025 20:04:10 GMT, Srinivas Vamsi Parasa <sparasa at openjdk.org> wrote:

>> The current scheme for Intel APX NDD code generation favors the emission of NDD instruction on APX-enabled targets, even if destination and source registers are the same. To prevent this, this PR extends the assembler layer to demote EEVEX to REX encoding if dst matches with source operands.
>
> Srinivas Vamsi Parasa has updated the pull request incrementally with one additional commit since the last revision:
> 
>   cleanup ecmov, eorw and other refactoring

src/hotspot/cpu/x86/assembler_x86.cpp line 1819:

> 1817: void Assembler::ecmovl(Condition cc, Register dst, Register src1, Register src2) {
> 1818:   InstructionAttr attributes(AVX_128bit, /* vex_w */ false, /* legacy_mode */ false, /* no_mask_reg */ true, /* uses_vl */ false);
> 1819:   evex_opcode_and_int16_ndd(dst->encoding(), src1->encoding(), src2->encoding(), VEX_SIMD_NONE, VEX_OPCODE_0F_3C, &attributes, 0x40 | cc, 0xC0, false);

This could be instead call to:
evex_opcode_int16_ndd(dst->encoding(), src2->encoding(), src1->encoding(), ..)
We can remove the separate method evex_opcode_and_int16_ndd() method altogether.

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PR Review Comment: https://git.openjdk.org/jdk/pull/24431#discussion_r2067108373