RFR: 8360654: AArch64: Remove redundant dmb from C1 compareAndSet [v2]

[Samuel Chee]

On Fri, 25 Jul 2025 08:03:22 GMT, Andrew Haley <aph at openjdk.org> wrote:

>> @theRealAph coincidentally, I have been looking at `MacroAssembler::cmpxchgw` and `MacroAssembler::cmpxchgptr` recently, and it appears their trailing DMBs may also be unnecessary.
>> 
>> I have been unable to find any particular use patterns which relies on the existence of these trailing dmbs, so it does not seem necessary to add the trailingDMB option. Although would like to hear your thoughts on the issue.
>
>> I have been unable to find any particular use patterns which relies on the existence of these trailing dmbs, so it does not seem necessary to add the trailingDMB option. Although would like to hear your thoughts on the issue.
> 
> Maybe simply move the `dmb` after the non-LSE ldxr/stxr logic, then.

My proposal is:

1. For `cmpxchg`, we add a trailingDMB option, and emit if `!useLSE && trailingDMB`, moving the dmbs from outside to inside the method. Have default value for trailingDMB be false so other call sites won't emit this dmb hence won't be affected.

2. In a separate ticket, `cmpxchgptr` and `cmpxchgw` already have DMBs inside their method definitions, so add extra trailingDMB parameter defaulted to true. And emit dmb if true.

3. In a separate ticket, apply same logic to `atomic_##NAME` to move DMB inside function and default trailingDMB to false to not affect other call sites.

Does this sound good to you?

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PR Review Comment: https://git.openjdk.org/jdk/pull/26000#discussion_r2254584804