RFR: 8361582: AArch64: Some ConH values cannot be replicated with SVE [v7]

[Bhavana Kilambi]

On Mon, 18 Aug 2025 13:08:06 GMT, Andrew Haley <aph at openjdk.org> wrote:

>> Bhavana Kilambi has updated the pull request incrementally with one additional commit since the last revision:
>> 
>>   Addressed review comments
>
> There's something that I still do not understand.
> 
> In your tests I see this:
> 
> 
>     // For vectorizable loops containing FP16 operations with an FP16 constant as one of the inputs, the IR
>     // node `(dst (Replicate con))` is generated to broadcast the constant into all lanes of an SVE register.
>     // On SVE-capable hardware with vector length > 16B, if the FP16 immediate is a signed value within the
>     // range [-128, 127] or a signed multiple of 256 in the range [-32768, 32512] for element widths of
>     // 16 bits or higher then the backend should generate the "replicateHF_imm_gt128b" machnode.
> 
> 
> Why is this restricted to special constants? You should be able to do this with any value by generating
> `mov rtemp, #n; dup zn.h, rtemp`. There's no need to generate `mov rtemp, #n; fmov stemp, rtemp; dup zn.h, stemp`

Hi @theRealAph if you got a chance to take a look at my response, was it clear enough or do you think this patch needs more changes? Thanks!

-------------

PR Comment: https://git.openjdk.org/jdk/pull/26589#issuecomment-3204737087