RFR: 8349138: Optimize Math.copySign API for Intel e-core targets [v2]

[Jatin Bhateja]

On Mon, 3 Feb 2025 14:17:26 GMT, Jatin Bhateja <jbhateja at openjdk.org> wrote:

>> Math.copySign is only intrinsified on x86 targets supporting the AVX512 feature.
>> Intel E-core Xeons support only the AVX2 feature set and still compile Java implementation which is composed of logical operations.
>> 
>> Since there is a 3-cycle penalty for copying incoming float/double values to GPRs before being operated upon by logical operation there is an opportunity to optimize this using an efficient instruction sequence.
>> 
>> Patch uses ANDPS and ANDPD logical instruction to generate efficient instruction sequences to absorb domain copy over penalty. Also, performs minor tuning for existing AVX512 instruction sequence based on VPTERNLOG instruction.
>> 
>> Following are the performance numbers of the following existing microbenchmark  
>> https://github.com/openjdk/jdk/blob/master/test/micro/org/openjdk/bench/vm/compiler/Signum.java
>> 
>> Patch passes following validation test
>> [test/jdk/java/lang/Math/IeeeRecommendedTests.java
>> ](https://github.com/openjdk/jdk/blob/master/test/jdk/java/lang/Math/IeeeRecommendedTests.java)
>> 
>> 
>> Granite Rapids-AP (P-core Xeon)
>> Baseline AVX512:
>> Benchmark                      Mode  Cnt     Score   Error   Units
>> Signum._5_copySignFloatTest   thrpt    2  1296.141          ops/ns
>> Signum._7_copySignDoubleTest  thrpt    2   838.954          ops/ns
>> 
>> Withopt :
>> Benchmark                      Mode  Cnt    Score   Error   Units
>> Signum._5_copySignFloatTest   thrpt    2  940.240          ops/ns
>> Signum._7_copySignDoubleTest  thrpt    2  967.370          ops/ns
>> 
>> Baseline AVX2:
>> Benchmark                      Mode  Cnt   Score   Error   Units
>> Signum._5_copySignFloatTest   thrpt    2  63.673          ops/ns
>> Signum._7_copySignDoubleTest  thrpt    2  26.898          ops/ns
>> 
>> Withopt :
>> Benchmark                      Mode  Cnt    Score   Error   Units
>> Signum._5_copySignFloatTest   thrpt    2  785.801          ops/ns
>> Signum._7_copySignDoubleTest  thrpt    2  558.710          ops/ns
>> 
>> Sierra Forest (E-core Xeon)
>> Baseline:
>> Benchmark                                       (seed)   Mode  Cnt        Score   Error   Units
>> o.o.b.vm.compiler.Signum._5_copySignFloatTest      N/A  thrpt    2       40.528          ops/ns
>> o.o.b.vm.compiler.Signum._7_copySignDoubleTest     N/A  thrpt    2       25.101          ops/ns
>> 
>> Withopt:
>> Benchmark                                       (seed)   Mode  Cnt        Score   Error   Units
>> o.o.b.vm.compiler.Signum._5_copySignFloatTest      N/A  thrpt    2      676....
>
> Jatin Bhateja has updated the pull request incrementally with one additional commit since the last revision:
> 
>   Adding IR framework verification test

src/hotspot/cpu/x86/x86.ad line 6745:

> 6743:   format %{ "CopySignF $dst, $src\t! using $xtmp1 as TEMP" %}
> 6744:   ins_encode %{
> 6745:     __ vpcmpeqd($xtmp1$$XMMRegister, $xtmp1$$XMMRegister, $xtmp1$$XMMRegister, Assembler::AVX_128bit);

If any of the vector operands is from a higher register bank (16-31) then we need an EVEX encoding and in such a case, the results of the comparison is always an opmask register.

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PR Review Comment: https://git.openjdk.org/jdk/pull/23386#discussion_r1939266632