RFR: 8348868: AArch64: Add backend support for SelectFromTwoVector

[Xiaohong Gong]

On Wed, 19 Feb 2025 08:14:40 GMT, Bhavana Kilambi <bkilambi at openjdk.org> wrote:

>> src/hotspot/cpu/aarch64/c2_MacroAssembler_aarch64.cpp line 2735:
>> 
>>> 2733:       ShouldNotReachHere();
>>> 2734:   }
>>> 2735:   mulv(dst, size2, index, tmp1);
>> 
>> Can we use vector `lsl` instead of `mul` here, so that we can also support D types for NEON/SVE1 ?
>
> @XiaohongGong , thanks I'll give it a try and get back.

@Bhavana-Kilambi , left shift can not get right indexes here as values `0x2, 0x4` is landed in each B lane. Maybe we can just try with `bsl` for D size types, as it has only two lanes for long/double types with 128-bit vector length.

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PR Review Comment: https://git.openjdk.org/jdk/pull/23570#discussion_r1962894625