RFR: 8348868: AArch64: Add backend support for SelectFromTwoVector [v10]

[Hao Sun]

On Wed, 2 Jul 2025 08:26:00 GMT, Bhavana Kilambi <bkilambi at openjdk.org> wrote:

>> This patch adds aarch64 backend support for SelectFromTwoVector operation which was recently introduced in VectorAPI.
>> 
>> It implements this operation using a two table vector lookup instruction - "tbl" which is available only in Neon and SVE2.
>> 
>> For 128-bit vector length : Neon tbl instruction is generated if UseSVE < 2 and SVE2 "tbl" instruction is generated if UseSVE == 2.
>> 
>> For > 128-bit vector length : Currently there are no machines which have vector length > 128-bit and support SVE2. For all those machines with vector length > 128-bit and UseSVE < 2, this operation is not supported. The inline expander for this operation would fail and lowered IR will be generated which is a mix of two rearrange and one blend operation.
>> 
>> This patch also adds a boolean "need_load_shuffle" in the inline expander for this operation to test if the platform requires VectorLoadShuffle operation to be generated. Without this, the lowering IR was not being generated on aarch64 and the performance was quite poor.
>> 
>> Performance numbers with this patch on a 128-bit, SVE2 supporting machine is shown below -
>> 
>> 
>> Benchmark                                      (size)   Mode    Cnt     Gain
>> SelectFromBenchmark.selectFromByteVector        1024    thrpt   9       1.43
>> SelectFromBenchmark.selectFromByteVector        2048    thrpt   9       1.48
>> SelectFromBenchmark.selectFromDoubleVector      1024    thrpt   9       68.55
>> SelectFromBenchmark.selectFromDoubleVector      2048    thrpt   9       72.07
>> SelectFromBenchmark.selectFromFloatVector       1024    thrpt   9       1.69
>> SelectFromBenchmark.selectFromFloatVector       2048    thrpt   9       1.52
>> SelectFromBenchmark.selectFromIntVector         1024    thrpt   9       1.50
>> SelectFromBenchmark.selectFromIntVector         2048    thrpt   9       1.52
>> SelectFromBenchmark.selectFromLongVector        1024    thrpt   9       85.38
>> SelectFromBenchmark.selectFromLongVector        2048    thrpt   9       80.93
>> SelectFromBenchmark.selectFromShortVector       1024    thrpt   9       1.48
>> SelectFromBenchmark.selectFromShortVector       2048    thrpt   9       1.49
>> 
>> 
>> Gain column refers to the ratio of thrpt between this patch and the master branch after applying changes in the inline expander.
>
> Bhavana Kilambi has updated the pull request incrementally with one additional commit since the last revision:
> 
>   Addressed review comments

Overall, looks good to me except several nits.

src/hotspot/cpu/aarch64/aarch64_vector_ad.m4 line 5159:

> 5157: // consecutive. The match rules for SelectFromTwoVector reserve two consecutive vector registers
> 5158: // for src1 and src2.
> 5159: // Four combinations of vector registers each for vselect_from_two_vectors_HS_Neon and

I suppose the function names are changed now. Should use `select_from_two_vectors_Neon` and `select_from_two_vectors_SVE` instead.

src/hotspot/cpu/aarch64/aarch64_vector_ad.m4 line 5199:

> 5197:     __ select_from_two_vectors_SVE($dst$$FloatRegister, $src1$$FloatRegister,
> 5198:                                    $src2$$FloatRegister, $index$$FloatRegister,
> 5199:                                    $tmp$$FloatRegister, bt, length_in_bytes);

nit: Inside `select_from_two_vectors_SVE()`, `bt` is only used to compute `elemType_to_regVariant(bt)`. I suggest using `get_reg_variant(this)` here directly.

src/hotspot/cpu/aarch64/c2_MacroAssembler_aarch64.cpp line 2886:

> 2884:   bool is_byte = (bt == T_BYTE);
> 2885: 
> 2886:   if (is_byte) {

Suggestion:

  if (bt == T_BYTE) {

src/hotspot/cpu/aarch64/c2_MacroAssembler_aarch64.cpp line 2901:

> 2899:     }
> 2900:   } else {
> 2901:     int elemSize = (bt == T_SHORT) ? 2 : 4;

nit: use `elem_size`

src/hotspot/cpu/aarch64/c2_MacroAssembler_aarch64.cpp line 2902:

> 2900:   } else {
> 2901:     int elemSize = (bt == T_SHORT) ? 2 : 4;
> 2902:     uint64_t tblOffset = (bt == T_SHORT) ? 0x0100u : 0x03020100u;

nit: use `tbl_offset`

src/hotspot/cpu/aarch64/c2_MacroAssembler_aarch64.hpp line 197:

> 195: 
> 196:   // Select from a table of two vectors
> 197:   void select_from_two_vectors_Neon(FloatRegister dst, FloatRegister src1, FloatRegister src2,

As for the function name, I suggest using `select_from_two_vectors_(neon|sve)`. E.g., `vector_signum_(neon|sve)` or `vector_round_(neon|sve)` as defined in this file.

-------------

Marked as reviewed by haosun (Committer).

PR Review: https://git.openjdk.org/jdk/pull/23570#pullrequestreview-2978225584
PR Review Comment: https://git.openjdk.org/jdk/pull/23570#discussion_r2179445324
PR Review Comment: https://git.openjdk.org/jdk/pull/23570#discussion_r2181370525
PR Review Comment: https://git.openjdk.org/jdk/pull/23570#discussion_r2181383791
PR Review Comment: https://git.openjdk.org/jdk/pull/23570#discussion_r2181384078
PR Review Comment: https://git.openjdk.org/jdk/pull/23570#discussion_r2181384185
PR Review Comment: https://git.openjdk.org/jdk/pull/23570#discussion_r2179465592