RFR: 8343689: AArch64: Optimize MulReduction implementation [v8]

Mikhail Ablakatov mablakatov at openjdk.org
Fri Jul 11 06:22:44 UTC 2025


On Fri, 11 Jul 2025 02:01:06 GMT, Hao Sun <haosun at openjdk.org> wrote:

>> Mikhail Ablakatov has updated the pull request incrementally with one additional commit since the last revision:
>> 
>>   remove the strictly-ordered FP implementation as unused
>
> src/hotspot/cpu/aarch64/c2_MacroAssembler_aarch64.cpp line 1995:
> 
>> 1993: // Vector reduction multiply for integral type with ASIMD instructions.
>> 1994: // Note: temporary registers vtmp1 and vtmp2 are not used in some cases.
>> 1995: // Note: vsrc and vtmp2 may match.
> 
> I left a comment in this "resolved comment thread" several days ago. See https://github.com/openjdk/jdk/pull/23181/files#r2179185158. It might be overlooked since the whole conversation was marked as resolved already.
> 
> I personally think we should not allow `vsrc` and `vtmp2` to match.

Apologies for overlooking the comment. A suggestion that started the thread was marked as a nit so I felt okay about resolving it myself at the time.

If `vsrc` and `vtmp2` match it implies that `vsrc` is allowed to be modified. This is used so that `reduce_mul_integral_le128b` may be invoked either independently or to process a tail after `reduce_mul_integral_gt128b` here: https://github.com/openjdk/jdk/pull/23181/files#diff-75bfb44278df267ce4978393b9b6b6030a7e23065ca15436fb1a5009debc6e81R2106 . In the latter case a temporary register holding intermediate result value is passed to both `vsrc` and `vtmp2` parameters.

I can see it being somewhat confusing though. I could add an explicit boolean flag parameter, e.g. `is_tail_processing`, and do assertion checks based on its value. And extend the function comment with the described above.

I'm happy to consider other suggestions as well if any :)

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PR Review Comment: https://git.openjdk.org/jdk/pull/23181#discussion_r2199735442


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