RFR: 8359435: AArch64: add support for 8.5 SB instruction

[Evgeny Astigeevich]

On Fri, 13 Jun 2025 14:00:08 GMT, Evgeny Astigeevich <eastigeevich at openjdk.org> wrote:

> Speculation Barrier (SB) instruction can be used instead of a pair of DSB, ISB if supported. It should have better performance than DSB+ISB (https://developer.arm.com/documentation/102825/0100):
> 
>> ... a DSB+ISB sequence is expected to have a significantly greater impact on performance than an SB ...
> 
> CPUs supporting it:
> - Apple M2+
> - Neoverse-N2
> - Neoverse-V2
> 
> Tested:
> - Gtests passed

BTW Arm published a post in their blog about different implementations of spin pauses: https://community.arm.com/arm-community-blogs/b/architectures-and-processors-blog/posts/multi-threaded-applications-arm
A high accuracy delay requires FEAT_SB (Armv8.5-A), FEAT_ECV (Armv8.6-A) and FEAT_WFxT (Armv8.7-A).

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PR Comment: https://git.openjdk.org/jdk/pull/25801#issuecomment-2970878177