RFR: 8348868: AArch64: Add backend support for SelectFromTwoVector [v3]

[Bhavana Kilambi]

On Wed, 18 Jun 2025 08:36:13 GMT, Bhavana Kilambi <bkilambi at openjdk.org> wrote:

>> To check whether it is an issue, you can use 64bits and 128bits as an example. And change to use SVE2's `tbl` for this op with 64bits.
>
>> To check whether it is an issue, you can use 64bits and 128bits as an example. And change to use SVE2's tbl for this op with 64bits.
> 
> Yes, I tried that and it does give incorrect results. 
> It does an ldr into `d` regs but the tbl is on `z` regs. The values in the `index` are not a problem. They will be generated according to the vector length (in this case 64-bit) but since the `tbl` does a full register lookup (and not partial), it can return the higher bits of the `z` register as well.

> Consider a vector type with 128bits, and the max vector size is 256bits, the result would be incorrect if using current SVE2 tbl instruction?

Yes, it would be incorrect. I tried to use SVE2 tbl instruction for 64-bit on a 128-bit machine and the results are incorrect. But we currently do not have an SVE2 machine with 256-bit to test our implementation on.

 
> values in index would be inside the vector length of 256bits

 No, the index should contain values according to the vector length being used. I could see that for 64-bit Byte, it generates numbers between 0-15 and not 0-31 (for vector length of 128)

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PR Review Comment: https://git.openjdk.org/jdk/pull/23570#discussion_r2154009056