RFR: 8360654: AArch64: Remove redundant dmb from C1 compareAndSet

[Andrew Haley]

On Fri, 27 Jun 2025 09:56:33 GMT, Samuel Chee <duke at openjdk.org> wrote:

> Thanks for the feedback, could it be sufficient then to emit the dmb when not using LSE? And when using LSE, to not do so?

I don't think that LSE helps here. There's nothing to stop an unordered load moving before a `casal`. See _atomic-ordered-before_ in _The AArch64 Application Level Memory Model_.

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PR Comment: https://git.openjdk.org/jdk/pull/26000#issuecomment-3012484247