RFR: 8350840: C2: x64 Assembler::vpcmpeqq assert: failed: XMM register should be 0-15

Vladimir Kozlov kvn at openjdk.org
Tue Mar 11 16:59:52 UTC 2025


On Tue, 11 Mar 2025 10:46:39 GMT, Jatin Bhateja <jbhateja at openjdk.org> wrote:

> This bug fix patch addressed an assertion failure due to unexpected register operand encoding.
> AVX2 flavour of instruction "vpcmpeqq" expects to operate over XMM registers from lower register bank (0-15), in this case, the register mask associated with the destination vector operand of the matcher pattern also includes registers from the higher bank.
> 
> The issue can be reliably reproduced if we modify the static allocation order of XMM register through AD file change.
> Existing bug [JDK-8343294](https://bugs.openjdk.org/browse/JDK-8343294) already tracks the requirement to randomize the allocation ordering.
> 
> Kindly review and share your feedback.
> 
> Best Regards,
> Jatin

Looks fine to me too. Let me test it before approval.

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PR Review: https://git.openjdk.org/jdk/pull/23979#pullrequestreview-2675423585


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