RFR: 8349582: APX NDD code generation for OpenJDK [v12]

Jatin Bhateja jbhateja at openjdk.org
Thu Mar 13 11:06:12 UTC 2025


On Wed, 12 Mar 2025 20:52:07 GMT, Srinivas Vamsi Parasa <sparasa at openjdk.org> wrote:

>> The goal of this PR is to generate x86 code using Intel Advanced Performance Extensions (APX) instructions which doubles the number of general-purpose registers, from 16 to 32. Intel APX adds nondestructive destination (NDD) and no flags (NF) flavor for the scalar instructions through EVEX encoding.
>> 
>> For more information about APX, see https://www.intel.com/content/www/us/en/developer/articles/technical/advanced-performance-extensions-apx.html.
>
> Srinivas Vamsi Parasa has updated the pull request incrementally with one additional commit since the last revision:
> 
>   undo changes to testing implementation

Hi @vamsi-parasa , some minor comments.
Otherwise patch looks good to me.

src/hotspot/cpu/x86/assembler_x86.cpp line 339:

> 337:   assert(op1 == 0x81, "Unexpected opcode");
> 338:   if (is8bit(imm32)) {
> 339:     emit_int24(op1 | 0x02,        // set sign bit

Hi @vamsi-parasa, This is a nice code cache-friendly optimization for immediate operands arithmetic instruction. If the immediate value range fits within the 8-bit immediate value, we replace the instruction with an equivalent instruction with shorter encoding. Please add a few comments to it. We save 3 bytes per encoding, which offsets the EVEX encoding penalty.

src/hotspot/cpu/x86/x86_64.ad line 1550:

> 1548: {
> 1549:   int offset = ra_->reg2offset(in_RegMask(0).find_first_elem());
> 1550:   int reg = ra_->get_encode(this);

Please remove this line, reg is not being used.

src/hotspot/cpu/x86/x86_64.ad line 6274:

> 6272:   ins_encode %{
> 6273:     __ ecmovl(Assembler::parity, $dst$$Register, $src1$$Register, $src2$$Register);
> 6274:     __ ecmovl(Assembler::notEqual, $dst$$Register, $src1$$Register, $src2$$Register);

FTR, we need this special handling for unorder check fixup (UCF) for only eq / neq comparison since NaN == NaN is false, and parity flag bit is set if any of the operand is a NaN.

-------------

PR Review: https://git.openjdk.org/jdk/pull/23501#pullrequestreview-2680914108
PR Review Comment: https://git.openjdk.org/jdk/pull/23501#discussion_r1993243015
PR Review Comment: https://git.openjdk.org/jdk/pull/23501#discussion_r1992992553
PR Review Comment: https://git.openjdk.org/jdk/pull/23501#discussion_r1993001495


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