RFR: 8351994: Enable Extended EVEX to REX2/REX demotion when src and dst are the same [v22]

[Jatin Bhateja]

On Thu, 15 May 2025 13:18:33 GMT, Jatin Bhateja <jbhateja at openjdk.org> wrote:

>> Srinivas Vamsi Parasa has updated the pull request incrementally with one additional commit since the last revision:
>> 
>>   Fix for UseAddressNop related failure
>
> src/hotspot/cpu/x86/x86_64.ad line 8688:
> 
>> 8686:   ins_pipe(ialu_reg_reg_alu0);
>> 8687: %}
>> 8688: 
> 
> Hi @vamsi-parasa ,
> Can you also remove pattern at line number 7071,  we may need to handle it diffently, I understand memory operand ordering can impact the NDD instruction opcode, but ADLC automatically create multiple DFA match patterns for commutative operations and in this case we don't see a pattern corresponding to line 7071 in ADLC generate dfa_x86.cpp since it may have assumed pattern to be equivalent to the one at line 7056.
>  
> https://github.com/openjdk/jdk/blob/master/src/hotspot/cpu/x86/x86_64.ad#L7056
> https://github.com/openjdk/jdk/blob/master/src/hotspot/cpu/x86/x86_64.ad#L7071

Same may also apply to following pattern pairs.

instruct xorI_rReg_mem_rReg_ndd(rRegI dst, memory src1, rRegI src2, rFlagsReg cr)
instruct xorI_rReg_rReg_mem_ndd(rRegI dst, rRegI src1, memory src2, rFlagsReg cr)

instruct andL_rReg_mem_rReg_ndd(rRegL dst, memory src1, rRegL src2, rFlagsReg cr)
instruct andL_rReg_rReg_mem_ndd(rRegL dst, rRegL src1, memory src2, rFlagsReg cr)

instruct xorL_rReg_mem_rReg_ndd(rRegL dst, memory src1, rRegL src2, rFlagsReg cr)
instruct xorL_rReg_rReg_mem_ndd(rRegL dst, rRegL src1, memory src2, rFlagsReg cr)

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PR Review Comment: https://git.openjdk.org/jdk/pull/24431#discussion_r2091258454