RFR: 8351994: Enable Extended EVEX to REX2/REX demotion when src and dst are the same [v22]

[Jatin Bhateja]

On Thu, 15 May 2025 01:24:51 GMT, Srinivas Vamsi Parasa <sparasa at openjdk.org> wrote:

>> Intel APX NDD instructions are encoded using EVEX encoding. The goal of this PR is to enable optimized instruction encoding for Intel APX NDD instructions when the non-destructive destination is same as the first source.
>> 
>> For example:
>> 
>> `eaddl r18, r18, r25` can be encoded as `addl r18, r25` using APX REX2 encoding
>> `eaddl r2, r2, r7` can be encoded as `addl r2, r7` using non-APX legacy encoding
>
> Srinivas Vamsi Parasa has updated the pull request incrementally with one additional commit since the last revision:
> 
>   Fix for UseAddressNop related failure

src/hotspot/cpu/x86/x86_64.ad line 8688:

> 8686:   ins_pipe(ialu_reg_reg_alu0);
> 8687: %}
> 8688: 

Hi @vamsi-parasa ,
Can you also remove pattern at line number 7071,  we may need to handle it diffently, I understand memory operand ordering can impact the NDD instruction opcode, but ADLC automatically create multiple DFA match patterns for commutative operations and in this case we don't see a pattern corresponding to line 7071 in ADLC generate dfa_x86.cpp since it may have assumed pattern to be equivalent to the one at line 7056.
 
https://github.com/openjdk/jdk/blob/master/src/hotspot/cpu/x86/x86_64.ad#L7056
https://github.com/openjdk/jdk/blob/master/src/hotspot/cpu/x86/x86_64.ad#L7071

-------------

PR Review Comment: https://git.openjdk.org/jdk/pull/24431#discussion_r2091156463