RFR: 8351994: Enable Extended EVEX to REX2/REX demotion when src and dst are the same [v23]

[Jatin Bhateja]

On Thu, 15 May 2025 17:07:14 GMT, Srinivas Vamsi Parasa <sparasa at openjdk.org> wrote:

>> Intel APX NDD instructions are encoded using EVEX encoding. The goal of this PR is to enable optimized instruction encoding for Intel APX NDD instructions when the non-destructive destination is same as the first source.
>> 
>> For example:
>> 
>> `eaddl r18, r18, r25` can be encoded as `addl r18, r25` using APX REX2 encoding
>> `eaddl r2, r2, r7` can be encoded as `addl r2, r7` using non-APX legacy encoding
>
> Srinivas Vamsi Parasa has updated the pull request incrementally with one additional commit since the last revision:
> 
>   Update src/hotspot/cpu/x86/assembler_x86.cpp
>   
>   Reorder comment
>   
>   Co-authored-by: Jatin Bhateja <jatin.bhateja at intel.com>

We are only handling first variant of NDD instruction[1] in python test script , please extend the script to cover second variant[2] also.
eaddq(Register dst, Register src1, Address src2, bool no_flags)   - [1]
eaddq(Register dst, Address src1, Register src2, bool no_flags)  - [2]

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PR Comment: https://git.openjdk.org/jdk/pull/24431#issuecomment-2884577990