RFR: 8357304: [PPC64] C2: Implement MinV, MaxV and Reduction nodes
Martin Doerr
mdoerr at openjdk.org
Wed May 21 13:11:35 UTC 2025
On Tue, 20 May 2025 06:47:45 GMT, David Linus Briemann <duke at openjdk.org> wrote:
> The following nodes are added:
> - MinV / MaxV
> - AndV / OrV / XorV
> - MinReductionV / MaxReductionV / AndReductionV / OrReductionV / XorReductionV
> - AddReductionVI / MulReductionVI
Very nice! Needs some adaptations.
src/hotspot/cpu/ppc/assembler_ppc.hpp line 597:
> 595: XVMINDP_OPCODE = (60u << OPCODE_SHIFT | 232u << 2),
> 596: XVMAXSP_OPCODE = (60u << OPCODE_SHIFT | 192u << 2),
> 597: XVMAXDP_OPCODE = (60u << OPCODE_SHIFT | 224u << 2),
Should be "<< 3".
src/hotspot/cpu/ppc/c2_MacroAssembler_ppc.cpp line 656:
> 654: vmaxsw(dst, a, b);
> 655: break;
> 656: default: assert(false, "wrong opcode");
Maybe put each case in one line? Would be more compact. Up to you.
src/hotspot/cpu/ppc/ppc.ad line 14307:
> 14305: instruct vand(vecX dst, vecX src1, vecX src2) %{
> 14306: match(Set dst (AndV src1 src2));
> 14307: format %{ "VAND $dst,$src1,$src2\t// and vectors" %}
Each of these nodes should have a size.
src/hotspot/cpu/ppc/ppc.ad line 14391:
> 14389: %}
> 14390: ins_pipe(pipe_class_default);
> 14391: %}
Better move up to vmin_reg.
-------------
PR Review: https://git.openjdk.org/jdk/pull/25318#pullrequestreview-2855537618
PR Review Comment: https://git.openjdk.org/jdk/pull/25318#discussion_r2098838125
PR Review Comment: https://git.openjdk.org/jdk/pull/25318#discussion_r2098842435
PR Review Comment: https://git.openjdk.org/jdk/pull/25318#discussion_r2098844852
PR Review Comment: https://git.openjdk.org/jdk/pull/25318#discussion_r2098847728
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