RFR: 8357304: [PPC64] C2: Implement MinV, MaxV and Reduction nodes

[Martin Doerr]

On Tue, 20 May 2025 06:47:45 GMT, David Linus Briemann <duke at openjdk.org> wrote:

> The following nodes are added:
> - MinV / MaxV
> - AndV / OrV / XorV
> - MinReductionV / MaxReductionV / AndReductionV / OrReductionV / XorReductionV
> - AddReductionVI / MulReductionVI

src/hotspot/cpu/ppc/c2_MacroAssembler_ppc.cpp line 682:

> 680:   vsldoi(vTmp1, vTmp2, vTmp2, 4);         // vTmp1 <- [op(i1,i3), op(i2,i0), op(i3,i1), op(i0,i2)]
> 681:   fn_vec_op(opcode, vTmp1, vTmp1, vTmp2); // vTmp1 <- [op(i0,i1,i2,i3), op(i0,i1,i2,i3), op(i0,i1,i2,i3), op(i0,i1,i2,i3)]
> 682:   mfvsrwz(dst, vTmp1.to_vsr());           //

Maybe use R0 and avoid TEMP_DEF effect?

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PR Review Comment: https://git.openjdk.org/jdk/pull/25318#discussion_r2100555225