RFR: 8351950: C2: AVX512 vector assembler routines causing SIGFPE / no valid evex tuple_table entry

[Sandhya Viswanathan]

On Mon, 12 May 2025 12:11:36 GMT, Jatin Bhateja <jbhateja at openjdk.org> wrote:

>> @jatin-bhateja I'll run some internal testing, please ping me in 24h for results! :)
>
>> @jatin-bhateja I'll run some internal testing, please ping me in 24h for results! :)
> 
> Please use the latest version

> > @jatin-bhateja @sviswa7 Can you explain the impact of the `EVEX_HVM`, `EVEX_QVM` etc, and what is the impact if we get them wrong? Performance? Wrong results? How can we test that they are correct?
> 
> @eme64 In EVEX the displacement for memory in the addressing mode is encoded using compressed disp8 encoding scheme. The EVEX_FVM, EVEX_HVM, EVEX_QVM etc denote tuple type and are used to determine the scaling factor for displacement. Please see section "2.7.5 Compressed Displacement (disp8*N) Support in EVEX" in [Intel SDM Volume 2](https://cdrdv2.intel.com/v1/dl/getContent/671110). So to answer your question, if the tuple type is incorrect we will see wrong results if the displacement is non zero.

For testing, the best way would be to create a SIMD instruction encoding test tool on similar lines as https://github.com/openjdk/jdk/commit/52d752c43b3a9935ea97051c39adf381084035cc in a separate future PR.

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PR Comment: https://git.openjdk.org/jdk/pull/25021#issuecomment-2899098119