Integrated: 8357056: RISC-V: Asm fixes - load/store width

[Robbin Ehn]

On Thu, 15 May 2025 14:46:12 GMT, Robbin Ehn <rehn at openjdk.org> wrote:

> Hi, please consider.
> 
> While working on https://github.com/openjdk/jdk/pull/25252, I notice:
> - Major op code was just repeat
> - Width coded in binary
> - Stores have mixed up rs1 and rs2
> - Bonus, fsd used a macro for no reason
> 
> I think this improves readability.
> 
> Tested tier1
> 
> Thanks, Robbin

This pull request has now been integrated.

Changeset: daa8eda5
Author:    Robbin Ehn <rehn at openjdk.org>
URL:       https://git.openjdk.org/jdk/commit/daa8eda530c4c3929c68ace1f1a2d1ed62331584
Stats:     289 lines in 1 file changed: 120 ins; 76 del; 93 mod

8357056: RISC-V: Asm fixes - load/store width

Reviewed-by: fjiang, mli, luhenry, fyang

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PR: https://git.openjdk.org/jdk/pull/25253