RFR: 8357695: RISC-V: Move vector intrinsic condition checks into match_rule_supported_vector

[Fei Yang]

On Mon, 26 May 2025 02:52:01 GMT, Dingli Zhang <dzhang at openjdk.org> wrote:

> Hi all,
> Please take a look and review this PR, thanks!
> 
> Currently, the match_rule_supported function in riscv.ad contains checks for vector-related intrinsics (e.g., FmaVF, FmaVD, RoundVF, RoundVD). These checks can be centralized into the match_rule_supported_vector function in the riscv_v.ad file, ensuring consistent handling in their appropriate context.
> 
> ### Testing
> * [x]  Linux riscv64 server release build on SG2042

src/hotspot/cpu/riscv/riscv_v.ad line 127:

> 125:       case Op_FmaVF:
> 126:       case Op_FmaVD:
> 127:         return UseRVV && UseFMA;

Since `UseRVV` flag has already been checked on function entry at L58, the `UseRVV` check here could be removed.
Similar for case `Op_RoundVF` and case `Op_RoundVD`.

src/hotspot/cpu/riscv/riscv_v.ad line 132:

> 130:       // regression when MaxVectorSize == 16. So only enable the intrinsic when MaxVectorSize >= 32.
> 131:       case Op_RoundVF:
> 132:         return UseRVV && MaxVectorSize >= 32;

Could we use the input vector length `vlen` to do the check? Maybe `return vlen >= 8;` will do.

src/hotspot/cpu/riscv/riscv_v.ad line 139:

> 137:       // regression for double when MaxVectorSize == 64+. So only enable the intrinsic when MaxVectorSize >= 64.
> 138:       case Op_RoundVD:
> 139:         return UseRVV && MaxVectorSize >= 64;

Simiar here. Maybe `return vlen >= 8;` will do.

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PR Review Comment: https://git.openjdk.org/jdk/pull/25438#discussion_r2108101750
PR Review Comment: https://git.openjdk.org/jdk/pull/25438#discussion_r2108103657
PR Review Comment: https://git.openjdk.org/jdk/pull/25438#discussion_r2108104091