RFR: 8351997: AArch64: Interpreter volatile reference stores with G1 are not sequentially consistent

[Erik Österlund]

The optimized fast_aputfield bytecode on AArch64 stores the field flags in r3, and performs the leading and trailing fencing depending on its volatile bit being set or not. However, r3 is also the last temp register passed in to the barrier set for reference stores, and G1 clobbers it in a way that may clear the volatile bit. Then the trailing fence won't get executed, and sequential consistency is broken.

My fix puts the flags in r5 instead, which is the register that was used by normal aputfield bytecodes. This way, barriers don't clobber the volatile bits.

This bug has been observed to mess up a classic Dekker duality in the java.util.concurrent.Exchanger class, leading to a hang in the test/jdk/java/util/concurrent/Exchanger/ExchangeLoops.java test that exercises it. Using G1 and -Xint a reproducer hangs 30/100 times in mach5. With the fix, the same reproducer hangs 0/100 times.

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Commit messages:
 - 8351997: AArch64: Interpreter volatile reference stores with G1 are not sequentially consistent

Changes: https://git.openjdk.org/jdk/pull/25483/files
  Webrev: https://webrevs.openjdk.org/?repo=jdk&pr=25483&range=00
  Issue: https://bugs.openjdk.org/browse/JDK-8351997
  Stats: 4 lines in 1 file changed: 0 ins; 0 del; 4 mod
  Patch: https://git.openjdk.org/jdk/pull/25483.diff
  Fetch: git fetch https://git.openjdk.org/jdk.git pull/25483/head:pull/25483

PR: https://git.openjdk.org/jdk/pull/25483