RFR: 8370473: C2: Better Aligment of Vector Spill Slots [v2]

Richard Reingruber rrich at openjdk.org
Fri Nov 7 16:29:30 UTC 2025


On Fri, 7 Nov 2025 11:14:00 GMT, Martin Doerr <mdoerr at openjdk.org> wrote:

>> Richard Reingruber has updated the pull request incrementally with two additional commits since the last revision:
>> 
>>  - Enhance comment
>>  - Fix OptoAssembly for Power 8
>
> src/hotspot/cpu/ppc/ppc.ad line 1800:
> 
>> 1798:     int src_offset = ra_->reg2offset(src_lo);
>> 1799:     int dst_offset = ra_->reg2offset(dst_lo);
>> 1800:     DEBUG_ONLY(int algm = MIN2(RegMask::num_registers(ideal_reg()), (int)Matcher::stack_alignment_in_slots()) * VMRegImpl::stack_slot_size);
> 
> This must always be 16, but ok. (Instructions can't encode other offsets.) You can keep it this way.

I don't like hard coded integer literals.
I also think that further clean-up is needed. E.g. `ideal_reg() == Op_VecX` should be asserted for vectors.

> src/hotspot/cpu/ppc/ppc.ad line 1839:
> 
>> 1837:         } else {
>> 1838:           st->print("%-7s %s, R1_SP, %d \t// vector spill copy", "ADDI", Matcher::regName[src_lo], dst_offset);
>> 1839:           st->print("%-7s %s, [R1_SP] \t// vector spill copy", "STXVD2X", Matcher::regName[src_lo]);
> 
> The output looks wrong. We write to [R0], not [R1_SP]. Better use one line?

Good catch. Not easy to test since on Power 8 usage of vectors is disabled. I've fixed it hopefully.
> Better use one line?

You can't mean one output line with 2 instructions. Sorry don't get it...

-------------

PR Review Comment: https://git.openjdk.org/jdk/pull/27969#discussion_r2504405180
PR Review Comment: https://git.openjdk.org/jdk/pull/27969#discussion_r2504411015


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